#ifndef ISR_H
#define ISR_H

/* FILE: ISR.h */
/****************************************************************************************/
/* MODULE NAME: MC9S12XS128 - ISR => Interrupt Service Routine (interruptions)          */
/*                                                                                      */
/* AUTHOR     : B.LARNAUDIE & J.O.KLEIN                                                 */
/*                                                                                      */
/* EMAIL      : bruno.larnaudie@u-psud.fr                                               */
/*              jacques-olivier.klein@u-psud.fr                                         */
/* INSTITUTION: IUT de CACHAN - 9 av. de la div. Leclerc - 94230 CACHAN                 */
/*                                                                                      */
/* DATE       : 03/07/2012                                                              */
/* CPU        : FREESCALE MC9S12XS128MAA                                                */
/* BOARD      : CACHAN Xboard+MicroB12                                                  */
/* OS         : None                                                                    */
/*                                                                                      */
/* DESCRIPTION: Definition des numeros de canaux d'interruption pour le MC9S12XS128     */
/****************************************************************************************/

#include "ktypes.h"

  
/****************************************************************************************/
/* Constantes symboliques        																                        */
/****************************************************************************************/
#define	RESET_ISR		      0	  //	FFFE-FFFF	RESET	-
#define	CLKMONFAIL_ISR		1	  //	FFFC-FFFD	CLOCK MONITOR FAIL RESET	PLLCTL (CME, SCME)
#define	COP_ISR		        2   //	FFFA-FFFB	COP RESET (WATCHDOG TIMER)	COP RATE SELECT
#define	UNIMPLTRAP_ISR		3	  //	FFF8-FFF9	UNIMPLEMENTED INSTRUCTION TRAP	-
#define	SWI_ISR		        4	  //	FFF6-FFF7	SWI	-
#define	XISRQ_ISR		      5	  //	FFF4-FFF5	XISRQ	-
#define	ISRQ_ISR		      6	  //	FFF2-FFF3	ISRQ	-
#define	RTI_ISR		        7	  //	FFF0-FFF1	REAL TIME INTERRUPT (RTI)	ISRQCR (ISRQEN)

/* - TIM ********************************************************************************/
#define	ECT0_ISR		      8 	//	FFEE-FFEF	ENHANCED CAPTURE TIMER 0	TIE (C0I)
#define	ECT1_ISR		      9 	//	FFEC-FFED	ENHANCED CAPTURE TIMER 1	TIE (C1I)
#define	ECT2_ISR		      10	//	FFEA-FFEB	ENHANCED CAPTURE TIMER 2	TIE (C2I)
#define	ECT3_ISR		      11	//	FFE8-FFE9	ENHANCED CAPTURE TIMER 3	TIE (C3I)
#define	ECT4_ISR		      12	//	FFE6-FFE7	ENHANCED CAPTURE TIMER 4	TIE (C4I)
#define	ECT5_ISR		      13	//	FFE4-FFE5	ENHANCED CAPTURE TIMER 5	TIE (C5I)
#define	ECT6_ISR		      14	//	FFE2-FFE3	ENHANCED CAPTURE TIMER 6	TIE (C6I)
#define	ECT7_ISR		      15	//	FFE0-FFE1	ENHANCED CAPTURE TIMER 7	TIE (C7I)
#define	TOF_ISR		        16	//	FFDE-FFDF	ENHANCED CAPTURE OVERFLOW	TSCR2 (TOF)
#define	PAOV_ISR		      17	//	FFDC-FFDD	PULSE ACCUMULATOR A OVERFOW	PACTL (PAOVI)
#define	PA_ISR		        18	//	FFDA-FFDB	PULSE ACCUMULATOR INPUT EDGE	PACTL (PAI)

/* - SPI ********************************************************************************/
#define	SPI0_ISR		      19	//	FFD8-FFD9	SPI0	SP0CR1 (SPIE,SPTIE)

/* - SCI ********************************************************************************/
#define	SCI0_ISR		      20	//	FFD6-FFD7	SCI0	SC0CR2 (TIE,TCIE,RIE,ILIE)
#define	SCI1_ISR		      21	//	FFD4-FFD5	SCI1	SC1CR2 (TIE,TCIE,RIE,ILIE)

/* - ATD ********************************************************************************/
#define	ATD0_ISR		      22	//	FFD2-FFD3	ATD0	ATD0CTL2 (ASCIE)

/* - RESERVED ***************************************************************************/
#define	RES23_ISR		      23	//	FFD0-FFD1	RESERVED

/* - PORTJ ********************************************************************************/
#define	PORTJ_ISR		      24	//	FFCE-FFCF	PORT J	PTJIF (PTJIE)

/* - PORTH ********************************************************************************/
#define	PORTH_ISR		      25	//	FFCC-FFCD	PORT H	PTHIF (PTHIE)

/* - RESERVED ***************************************************************************/
#define	RES26_ISR		      26	//	FFCA-FFCB	RESERVED
#define	RES27_ISR		      27	//	FFC8-FFC9	RESERVED

/* - PLL ********************************************************************************/
#define	PLLLOCK_ISR		    28	//	FFC6-FFC7	CRG PLL LOCK	CRGINT (LOCKIE)
#define	PLLSCM_ISR		    29	//	FFC4-FFC5	CRG SELF CLOCK MODE	CRGINT (SCMIE)

/* - RESERVED ***************************************************************************/
#define	RES30_ISR		      30	//	FFC2-FFC3 RESERVED
#define	RES31_ISR		      31	//	FFC0-FFC1	RESERVED
#define	RES32_ISR		      32	//	FFBE-FFBF	RESERVED
#define	RES33_ISR		      33	//	FFBC-FFBD RESERVED

/* - FLASH ******************************************************************************/
#define	FLASHFD_ISR		    34	//	FFBA-FFBB	FLASH	FAULT DETECT (SFDIE,DFDIE)
#define	FLASH_ISR		      35	//	FFB8-FFB9	FLASH (CCIE)

/* - CAN ********************************************************************************/
#define	CAN0WU_ISR		    36	//	FFB6-FFB7	CAN 0 WAKE UP	CAN0RIER (WUPIE)
#define	CAN0ERR_ISR		    37	//	FFB4-FFB5	CAN 0 ERROR	CAN0RIER (CSIE,OVRIE)
#define	CAN0RX_ISR		    38	//	FFB2-FFB3	CAN 0 RECEIVE	CAN0RIER (RXFIE)
#define	CAN0TX_ISR		    39	//	FFB0-FFB1	CAN 0 TRANSMIT	CAN0TIER (TXEIE2-TXEIE0)

/* - RESERVED ***************************************************************************/
#define	RES40_ISR    		  40	//	FFAE-FFAF RESERVED
#define	RES41_ISR		      41	//	FFAC-FFAD RESERVED
#define RES42_ISR		      42	//	FFAA-FFAB RESERVED
#define	RES43_ISR		      43	//	FFA8-FFA9 RESERVED
#define	RES44_ISR		      44	//	FFA6-FFA7 RESERVED
#define	RES45_ISR		      45	//	FFA4-FFA5 RESERVED
#define	RES46_ISR		      46	//	FFA2-FFA3 RESERVED
#define	RES47_ISR		      47	//	FFA0-FFA1 RESERVED
#define	RES48_ISR		      48	//	FF9E-FF9F RESERVED
#define	RES49_ISR		      49	//	FF9C-FF9D RESERVED
#define	RES50_ISR		      50	//	FF9A-FF9B RESERVED
#define	RES51_ISR		      51	//	FF98-FF99 RESERVED
#define	RES52_ISR		      52	//	FF96-FF97 RESERVED
#define	RES53_ISR		      53	//	FF94-FF95 RESERVED
#define	RES54_ISR		      54	//	FF92-FF93 RESERVED
#define	RES55_ISR		      55	//	FF90-FF91 RESERVED

/* - PORTP ******************************************************************************/
#define	PORTP_ISR		      56	//	FF8E-FF8F	PORT P	PTPIF (PTPIE)
#define	PWMEMSH_ISR		    57	//	FF8C-FF8D	PWM EMERGENCY SHUTDOWN	PWMSDN (PWMIE)

/* - RESERVED ***************************************************************************/
#define	RES58_ISR    		  58	//	FF8A-FF8B RESERVED
#define	RES59_ISR		      59	//	FF88-FF89 RESERVED
#define RES60_ISR		      60  //	FF86-FF87 RESERVED
#define	RES61_ISR		      61	//	FF84-FF85 RESERVED
#define	RES62_ISR		      62	//	FF82-FF83 RESERVED

/* - RESERVED ***************************************************************************/
#define	LV_ISR            63	//	FF80-FF81 LOW VOLTAGE INTERRUPT (LVI)
#define	API_ISR		        64	//	FF7E-FF7F AUTONOMOUS PERIODICAL INTERRUPT (API)
#define HTI_ISR		        65  //	FF7C-FF7D HIGH TEMPERATURE INTERRUPT (HTI)

/* - PIT ********************************************************************************/
#define	PIT0_ISR     		  66	//	FF7A-FF7B PERIODIC INTERRUPT TIMER CHANNEL 0 (PINTE0)
#define	PIT1_ISR 		      67	//	FF78-FF79 PERIODIC INTERRUPT TIMER CHANNEL 1 (PINTE1)
#define PIT2_ISR 		      68  //	FF76-FF77 PERIODIC INTERRUPT TIMER CHANNEL 2 (PINTE2)
#define	PIT3_ISR 		      69	//	FF74-FF75 PERIODIC INTERRUPT TIMER CHANNEL 3 (PINTE3)

/* - RESERVED ***************************************************************************/
#define	RES70_ISR		      70	//	FF72-FF73 RESERVED
#define	RES71_ISR		      71	//	FF70-FF71	RESERVED
#define	RES72_ISR    		  72	//	FF6E-FF6F RESERVED
#define	RES73_ISR		      73	//	FF6C-FF6D RESERVED
#define RES74_ISR		      74	//	FF6A-FF6B RESERVED
#define	RES75_ISR		      75	//	FF68-FF69 RESERVED
#define	RES76_ISR		      76	//	FF66-FF67 RESERVED
#define	RES77_ISR		      77	//	FF64-FF65 RESERVED
#define	RES78_ISR		      78	//	FF62-FF63 RESERVED
#define	RES79_ISR		      79	//	FF60-FF61 RESERVED
#define	RES80_ISR		      80	//	FF5E-FF5F RESERVED
#define	RES81_ISR		      81	//	FF5C-FF5D RESERVED
#define	RES82_ISR		      82	//	FF5A-FF5B RESERVED
#define	RES83_ISR		      83	//	FF58-FF59 RESERVED
#define	RES84_ISR		      84	//	FF56-FF57 RESERVED
#define	RES85_ISR		      85	//	FF54-FF55 RESERVED
#define	RES86_ISR		      86	//	FF52-FF53 RESERVED
#define	RES87_ISR		      87	//	FF50-FF51 RESERVED
#define	RES88_ISR		      88	//	FF4E-FF4F RESERVED
#define	RES89_ISR		      89	//	FF4C-FF4D RESERVED
#define	RES90_ISR		      90	//	FF4A-FF4B RESERVED
#define	RES91_ISR		      91	//	FF48-FF49 RESERVED
#define	RES92_ISR		      92	//	FF46-FF47 RESERVED
#define	RES93_ISR		      93	//	FF44-FF45 RESERVED
#define	RES94_ISR		      94	//	FF42-FF43 RESERVED
#define	RES95_ISR		      95	//	FF40-FF41 RESERVED

/* - ATD0 *******************************************************************************/
#define	ATD0C_ISR         96	//	FF3E-FF3F ATD0 COMPARE INTERRUPT (ACMPIE)

/* - RESERVED ***************************************************************************/
#define	RES97_ISR		      97	//	FF3C-FF3D RESERVED
#define RES98_ISR		      98	//	FF3A-FF3B RESERVED
#define	RES99_ISR		      99	//	FF38-FF39 RESERVED
#define	RES100_ISR		   100	//	FF36-FF37 RESERVED
#define	RES101_ISR		   101	//	FF34-FF35 RESERVED
#define	RES102_ISR		   102	//	FF33-FF33 RESERVED
#define	RES103_ISR		   103	//	FF30-FF31 RESERVED
#define	RES104_ISR		   104	//	FF2E-FF2F RESERVED
#define	RES105_ISR		   105	//	FF2C-FF2D RESERVED
#define	RES106_ISR		   106	//	FF2A-FF2B RESERVED
#define	RES107_ISR		   107	//	FF28-FF29 RESERVED
#define	RES108_ISR		   108	//	FF26-FF27 RESERVED
#define	RES109_ISR		   109	//	FF24-FF25 RESERVED
#define	RES110_ISR		   110	//	FF22-FF23 RESERVED
#define	RES111_ISR		   111	//	FF20-FF21 RESERVED
#define	RES112_ISR		   112	//	FF1E-FF1F RESERVED
#define	RES113_ISR		   113	//	FF1C-FF1D RESERVED
#define	RES114_ISR		   114	//	FF1A-FF1B RESERVED
#define	RES115_ISR		   115	//	FF18-FF19 RESERVED
#define	RES116_ISR		   116	//	FF16-FF17 RESERVED
#define	RES117_ISR		   117	//	FF14-FF15 RESERVED

/* INTERRUPT *****************************************************************************/
#define	SYSC_ISR		     118	//	FF12-FF13 SYSTEM CALL INTERRUPT (SYS)
#define	SPU_ISR		       119	//	FF10-FF11 SPURIOUS INTERRUPT 

#endif